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8. T6963C Instruction Set

Table 8.0: T6963C Instruction Set

Commands D7 D6 D5 D4 D3 D2 D1 D0 Description Execute Time
Pointer Set 0 0 1 0 0 N2 N1 N0 Status
0 0 1 Cursor Pointer Set check
0 1 0 Offset Register Set
1 0 0 Address Pointer Set
Control Word 0 1 0 0 0 0 N1 N0 32 x /fosc
Set Commands 0 0 Text Home Address Set
0 1 Text Area Set
1 0 Graphic Home Address Set
1 1 Graphic Area Set
Mode Set 1 0 0 0 CG N2 N1 N0 32 x 1/fosc
0 CG ROM Mode
1 CG RAM Mode
0 0 0 OR Mode
0 0 1 EXOR Mode
0 1 1 AND Mode
1 0 0 Text only (attribute capability)
Display Modes 1 0 0 1 N3 N2 N1 N0 32 x 1/fosc
0 Graphics Off
1 Graphics On
0 Text Off
1 Text On
0 Cursor Off
1 Cursor On
0 Cursor blink Off
1 Cursor blink On
Cursor Pattern 1 0 1 0 0 N2 N1 N0 N2~N0: No. of lines for cursor +1 32 x 1/fosc
Select 0 0 0 Bottom Line cursor
0 0 1 2 line cursor
| | |
1 1 1 8 line cursor (block cursor)
Data Auto 1 1 0 0 0 0 N1 N0 32 x 1/fosc
Read/Write 0 0 Data Auto Write Set
0 1 Data Auto Read Set
1 0 Auto reset (Address pointer auto-incremented) for continuous rd/wr
Data Read/Write 1 1 0 0 0 N2 N1 N0
0 Address Pointer up/down
1 Address Pointer unchanged
0 Address Pointer up
1 Address Pointer down
0 Data Write
1 Data Read
Screen Peeking 1 1 1 0 0 0 0 0 Read Displayed Data Status
Screen Copy
(Note 3)		 1 1 1 0 1 0 0 0 Copies 1 line of displayed data whose address is indicated
by the Address Pointer to Graphic RAM area		 Status
check
Bit Set/Reset 1 1 1 1 N3 N2 N1 N0 N2~N0 indicates the bit in the pointed address Status
check
0 Bit Reset
1 Bit Set
0 0 0 Bit 0 (LSB)
0 0 1 Bit 1
| | |
1 1 1 Bit 7 (MSB)

Note:
1. * = DONT CARE
2. Read the status of the STA0 and STA1 Flags before each new command or data byte is sent to the T6963C. If these two flags are set (i.e.=1) then the T6963C is not busy processing the previous instruction and it is safe to write a new command or data byte to the T6963C. If a new instruction is sent to the T6963C while these two flags are not set (i.e.=0), then that command shall be ignored by the T6963C.
3. In the case of a dual screen LCD the screen copy command should not be used.

8.1 Description of Pointer Set Commands (Two data bytes plus Command byte)

8.1.1 Cursor Pointer Set

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
First argument (0-7FH) * Cursor Column Position (Character)
Second argument (0-1FH) * * * Cursor Row Position (Character)
Cursor Pointer Set (21H) 0 0 1 0 0 0 0 1

The cursor Pointer Set command has two data bytes associated with it to specify the character position for the cursor. This is the only command which will shift or move the cursor. The cursor is not shifted by Data write commands. Cursor position should be set to be within actual display area.

8.1.2 Offset Register Set

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
First argument (0-1FH) * * * CG-RAM Address
Second argument (00H) 0 0 0 0 0 0 0 0
Offset Register Set 22H) 0 0 1 0 0 0 1 0

The lower five bits of the first data byte should be set to the upper 5 bits of the start address for the character generator RAM (CG-RAM) area. The second data byte should be set to zero. Refer to section 11.0 for details regarding the use of the CG-RAM area.

8.1.3 Address Pointer Set

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
First argument (0-FFH) Address Pointer (lower)
Second argument (0-FFH) Address Pointer (upper)
Address Pointer Set (24H) 0 0 1 0 0 1 0 0

The Address Pointer Set command is used to specify the start address for writing data to the video RAM (VRAM) or for reading data from the VRAM. The address should be set to a location in the actual display RAM area specified by the memory map for a given module. Refer to individual module specifications for details.

8.2 Description of Control Word Set Commands (Two data bytes plus Command byte)

8.2.1 Text Home Address Set (TH)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
First argument (0-FFH) Text Home Address (TH lower)
Second argument (0-FFH) Text Home Address (TH upper)
Text Home Address Set (40H) 0 1 0 0 0 0 0 0

This command defines the starting address of VRAM for text display data. The data stored in the Text Home (TH) Address will be displayed at the top left hand character position (the home position).

8.2.2 Text Area Set (TA)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
First argument (0-FFH) Number of columns of characters (TA)
Second argument (00H)

00H
Text Area Set (41H) 0 1 0 0 0 0 0 1

This command defines the number of columns of text for the Text area of VRAM. The Text Area (TA) may be set independantly of the number of characters per line set by hardware settings on the T6963C controller chip. It is usual to set the TA to the same number of characters per line as the LCD module will display. For example 64x240 LCD with 6x8 font size selected, set TA=28H, if 8x8 font size selected, set TA=1EH (Refer to section 10 for details).

8.2.3 Graphic Home Address Set (GH)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
First argument (0-FFH) Graphic Home Address (GH lower)
Second argument (0-FFH) Graphic Home Address (GH upper)
Text Home Address Set (42H) 0 1 0 0 0 0 1 0

This command defines the starting address of VRAM for graphic display area of VRAM. The data stored in the Graphic Home (GH) address will be displayed as the first 6 or 8 bits on the top row, left hand side of the LCD screen, depending on the font size selected. When using the Attribute function the GH address indicates the starting address for the Attribute RAM area.

8.2.4 Graphic Area Set (GA)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
First argument (0-FFH) Number of columns (GA)
Second argument (00H) 00H
Text Arae Set (43H) 0 1 0 0 0 0 1 1

This command defines the number of columns of graphic data for the Graphic Area of VRAM. The Graphic Area (GA) may be set independantly of the number of characters per line set by hardware settings on T6963C controller chip. It is usual to set the GA to the same number of characters per line as the LCD module will display.

8.3 Description of Mode Set Commands (Command byte only)

Description D7 D6 D5 D4 D3 D2 D1 D0
CG ROM Mode: code 00H-7FH; CG-ROM
code 80H-FFH; CG-RAM		 1 0 0 0 0 N2 N1 N0
CG-RAM Mode: code 00H-FFH; CG-RAM 1 0 0 0 1 N2 N1 N0


To use both the 128 character T6963C on chip character generator ROM (CG-ROM) and the 128 character external CG-RAM function set D3 to zero. To use only the 256 character CG-RAM user-defined character generator set D3 to one. Refer to section 11.0 for more information regarding the setting of D3. D2-D0 sets the mode by which the Text Area is merged with the Graphics Area. Note that text attributes can only be used in the Text only mode as the attribute data is stored in the graphics area.

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
Logically "OR" of Text with Graphics 1 0 0 0 * 0 0 0
Logically XOR of Text with Graphics 1 0 0 0 * 0 0 1
Logically AND of Text with Graphics 1 0 0 0 * 0 1 1
Text only (with Attribute data in Graphic Area) 1 0 0 0 * 1 0 0

8.4 Description of Display Mode Set Commands (Command byte only)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
Display Off (90H) 1 0 0 1 0 0 0 0
Cursor On, Blink Off 1 0 0 1 * * 1 0
Cursor On, Blink On 1 0 0 1 * * 1 1
Text On, Graphic Off 1 0 0 1 0 1 * *
Text Off, Graphic On 1 0 0 1 1 0 * *
Text On, Graphic On 1 0 0 1 1 1 * *

Cursor Blink: Enabled - Set D0 (N0=1), Disabled - Reset D0 (N0=0)

Cursor Enable: Enabled - Set D1 (N1=1), Disabled -Reset D1 (N1=0)

Text Enable: Enabled - Set D2 (N2=1), Disabled - Reset D2 (N2=0)

Graphic Enable:Enabled - Set D3 (N1=3), Disabled -Reset D3 (N1=3)

After Reset N3-N0 are reset to zero.

8.5 Description of Cursor Pattern Select Command (Command byte only)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
1 line cursor (A0H) 1 0 1 0 0 0 0 0
2 line cursor (A1H) 1 0 1 0 0 0 0 1
" " " " " " " " "
" " " " " " " " "
7 line cursor (A6H) 1 0 1 0 0 1 1 0
8 line cursor (A7H) 1 0 1 0 0 1 1 1

This single byte command selects the type of cursor displayed when the cursor is enabled. For a single underline type cursor send command "A0H". If a block style cursor is required sent command "A7H".

8.6 Description of Data Auto Read/Write Commands (Command byte only)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
Data Auto Write Set (B0H) 1 0 1 1 0 0 0 0
Data Auto Read Set (B1H) 1 0 1 1 0 0 0 1
Auto Mode Reset (B2H or B3H) 1 0 1 1 0 0 1 *

These single byte commands are useful when transferring blocks of data to or from the VRAM. After sending a Data Auto Write (B0H)or Data Auto Read (B1H) command it is not necessary to send Data Write or Data Read instructions (section 8.7) for each data byte being written to or read from the VRAM. Data Auto Write and Data Auto Read commands should follow the Address Pointer Set command (section 8.1.3). The Address Pointer will automatically increment by 1 for each data written or data read. After sending (or receiving) all data the Auto Mode Reset command (B2H or B3H) should be sent to return to normal operation. Note that no commands can be accepted when in Data Auto Write or Data Auto Read modes, as all bytes written or read are assumed to be display data bytes.

Start
|
STA0=1 & STA1=1
| Y
D1 (Addrs Data)
|
STA0=1 & STA1=1?
| Y
D2 (Addrs Data)
|
STA0=1 & STA1=1?
| Y
Address Pointer Set (24H)
|
STA0=1 & STA1=1?
| Y
Data Auto Write (B0H)
|
STA0=1 & STA1=1?
| Y
STA3=1?
| Y
Display Data
|
STA3=1?
| Y
Display Data
|
STA3=1?
|
Auto Reset (B2H)

8.7 Description of Data Read/Data Write Commands (Command byte only)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
Data Write - Address Pointer Auto Incremented (C0H) 1 1 0 0 0 0 0 0
Data Read - Address Pointer Auto Incremented (C1H) 1 1 0 0 0 0 0 1
Data Write - Address Pointer Auto Decremented (C2H) 1 1 0 0 0 0 1 0
Data Read - Address Pointer Auto Decremented (C3H) 1 1 0 0 0 0 1 1
Data Write - Address Pointer Auto Unchanged (C4H) 1 1 0 0 0 1 * 0
Data Read - Address Pointer Auto Unchanged (C5H) 1 1 0 0 0 1 * 1

These commands are used to write data to or read data from the VRAM. Data Read or Data Write commands should be sent after setting an address by the Pointer Set command (section 8.1.3). The Address Pointr may be automatically incremented , decremented or left unchanged depending on which Data Read/Write command is being sent. A Data Write or Data Read command is required for each data byte written to or read from the VRAM.

8.8 Description of Screen Peeking Command (Command byte only)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
Screen Peeking (E0H) 1 1 1 0 0 0 0 0

This single byte command is used to transfer 1 byte of displayed data to the data stack and may be read by the MPU using a Data Read command (section 8.7). This command is useful to read the logical combination of text and graphic data on the LCD screen. The Status flag STA6 should be checked after each Screen Peeking (E0H)command. If the Address Pointer (section 8.1.3) is not set to the Graphic RAM area, then the Screen Peeking command is ignored and STA6 is set to "1".

Start
|
STA0=1 & STA1=1?
| Y
D1 (Addrs Data)
|
STA0=1 & STA1=1?
| Y
D2 (Addrs Data)
|
STA0=1 & STA1=1?
| Y
Address Pointer Set (24H)
|
STA0=1 & STA1=1?
| Y
Screen Peeking (E0H)
|
STA6=0?
| Y
STA0=1 & STA1=1?
| Y
Data Read command

8.9 Description of Screen Copy Command (Command byte only)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
Screen Copy (E8H) 1 1 1 0 1 0 0 0

This single byte command is used to copy 1 row of data displayed on the LCD screen to the Graphic RAM area specified by the Address Pointer Set command (section 8.1.3). This Screen Copy command (E8H) cannot be used if the row of displayed data contains Text Attribute data as set by the Mode Set command (section 8.3). The Status flag STA6 should be checked after each Screen Copy command. If the Address Pointer (section 8.1.3) is not set to the Graphic RAM area, then the Screen Copy command is ignored and STA6 is set to "1".

Start
|
STA0=1 & STA1=1?
| Y
D1 (Addrs Data)
| STA0=1 & STA1=1?
| Y
D2 (Addrs Data)
|
STA0=1 & STA1=1?
| Y
Address Pointer Set (24H)
|
STA0=1 & STA1=1?
| Y
Screen Copy (E8H)
|
STA6=0?
| Y
STA0=1 & STA1=1?
| Y

8.10 Description of Bit Set/Bit Reset Command (Command byte only)

Description (Range) D7 D6 D5 D4 D3 D2 D1 D0
Bit Reset (F0H-F7H) 1 1 1 1 0 N2 N1 N0
Bit Set (F8H-FFH) 1 1 1 1 1 N2 N1 N0

This single byte command is used to set/reset individual bits in the RAM. This command allows one bit in the byte pointed to by the Address Pointer Set command (section 8.1.3) to be set or reset. Multiple bits in a byte cannot be set/reset at the same time. N0~N2 specifies the location of the bit to set/reset. 000 selects the least significant bit (LSB) and 111 the most significant bit (MSB).

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