8.1 Mode Control Register

The Mode Control register sets the operating mode for the HD61830(B). It controls the character/graphics mode, cursor, on/off/blink, master/slave and display on/off. When D1 is set to 1 and D0, D2 and D3 are set to 0, the HD61830(B) is set to graphics mode and the character generator and cursor functions are disabled.

8.2 Character Pitch Register

Character Mode:V_P and H_P set the horizontal and vertical size of each character cell. To display the 5x11 font stored in the CG-ROM set V_P=12 and H_P=6. That is set the Character Pitch register to B5H. If displaying only the 5x7 font then set VP=8 and HP=6. That is set the Character Pitch register to 75H. A value in the range of 1 to 16 may be used for V_P. A value in the range of 6 to 8 may be used for H_P. Refer to section 9.0 for pictorial definitions of V_P and H_P.

8.3 Horizontal Count Register

Character Mode: This register sets the number of horizontal characters that can be displayed on the LCD. The character width is defined by H_P in the Character Pitch Register (Section 8.2).

Graphics Mode: This register sets the number of horizontal bytes that can be displayed on the LCD. For graphics mode, it is best to set H_P=8.

If the total number of horizontal dots on the LCD screen is n then:

H_N = n /H_P

Note: HN must be an even integer value.in the range 2 < HN < 128

For example:If using HD61830(B) to control a 64x240 LCD screen in Character Mode, with HP=6 then set HN=28H. That is, write 27H into Horizontal Count register.

8.4 Multiplex Ratio Register (1/Duty)

Set N_X to the Duty cycle ratio of the LCD being used. N_X should be in the range 1 < N_X < 128.

8.5 Cursor Position Register

In Character Mode, C_P indicates the position of the cursor within the character cell defined by V_P and H_P in the Character Pitch register (Section 8.2). The horizontal width of the cursor is equal to H_P. A value of 1 to 16 may be set for C_P. If C_P > V_P no cursor will be displayed. If C_P < V_P the cursor has higher priority and the cursor shall be written over the top of the character on the LCD screen. C_P=1 means cursor will appear on top row of character cell; if C_P=V_P then cursor will appear on bottom row of character cell.

8.6 Display Start Address Registers

The High and Low order Display Start Address indicates a VRAM address at which the data displayed at the top left corner of the LCD screen is stored.

Character Mode:Set DB7~DB4 = 0, for High order Display Start Address. Only DB3~DB0 is valid for High order Display Start Address in the Character Mode. That is a value in the range of 0000H to 0FFFH may be written into the High/Low order Display Start Address registers for the HD61830(B) Character Mode.

Graphics Mode:All 16 bits of the High/Low order Display Start Address register are valid for the Graphics Mode of the HD61830(B). A value in the range 0000H to FFFFH may be written into the High/Low order Display Start Address registers. However bear in mind that not all LCD modules or controller cards have this much addressable RAM on-board. Refer to individual LCD module specifications for size of addressable VRAM.

The Display Start Address registers are very useful when implementing scrolling both horizontally and vertically. The Display Start Address may be incremented or decremented by the value H_N (section 8.3) to scroll up or down by one row of dots in the Graphics mode or by one character row (set by VP) in the Character mode. By incrementing/decrementing the Display Start Address by one will cause the LCD screen to shift horizontally left/right by the number of dots set by the value H_P (section 8.2) as shown by below.

For Example:

Before Incrementing Display Start Address.... After Incrementing Display Start Address....

8.7 Cursor Address Register ( VRAM write address register)

The Cursor Address registers set the address for reading/writing display data to the VRAM. Always write to the Low Order Cursor Address register first followed by the High order Cursor Address register. The High order Cursor Address register may be updated independently from the Low order Cursor Address register; however if the Low order Cursor Address register is updated then the High order Cursor Address register must also be updated directly afterwards.

The Cursor Address is automatically incremented by +1 after each successive Write-VRAM, Read-VRAM, Bit Set or Bit Clear instruction.

Character Mode: Set DB7~DB4 = 0, for High order Cursor Address. Only DB3~DB0 is valid for High order Cursor Address in the Character Mode. That is a value in the range of 0000H to 0FFFH may be written into the High/Low order Display Start Address registers for the HD61830(B) Character Mode.

Graphics Mode: All 16 bits of the High/Low order Cursor Address register are valid for the Graphics Mode of the HD61830(B). A value in the range 0000H to FFFFH may be written into the High/Low order Cursor Address registers. However bear in mind that not all LCD modules have this much addressable RAM on-board. Refer to individual LCD module specifications for size of addressable VRAM.

8.8 Write Data to VRAM Instruction

Character Mode:This instruction will load the character code data into VRAM at the address specified by the current value stored in the Cursor Address register (section 8.7). The Cursor Address register will increment by +1 after each successive Write-VRAM instruction. Therefore to write DENSITRON to VRAM address 01FFH, write the following sequence of commands to the HD61830(B):

Note:Check Busy Flag (BF) before steps 1, 3, and 5. All values are hexadecimal.

In order to move the word DENSITRON so that it is visible at the top left hand corner of the LCD screen set the Display Start Address register to 01FFH (section 8.6). Note that if the character code written to VRAM is not recognized by the CG-ROM then a blank character will be displayed on the LCD screen (Refer to section 14.0).

Graphics Mode: This instruction will load a byte of data into VRAM at the address specified by the current value stored in the Cursor Address (section 8.7). The Cursor Address register will increment by +1 after each successive Write-Vram instruction. The least significant bit (LSB) of each byte written to VRAM correspondes to the left most dot on the LCD screen (See section 10.0)

8.9 Read data from VRAM Instruction

This instruction outputs the data stored in the VRAM at the address immediately preceding the current Cursor Address. The Cursor Address is incremented by +1 after each successive Read-VRAM instruction. To read the VRAM data at the current Cursor Address it will be necessary to do a dummy Read-VRAM instruction so that the Cursor address is incremented by +1 before issuing the next read instruction which will put valid data on the data bus. For example assume DENSITRON is stored in VRAM starting at address 01FFH. The following sequence will read the data stored at addresses 01FFH to 0208H. Note the dummy read at step number 6. It is important to remember to make one dummy read when reading data after setting the Cursor Address register.

8.10 Bit Clear and Bit Set Instructions

The Clear/Set Bit instructions reset/set 1 bit in a byte of VRAM data to 0 or 1, respectively. The position of the bit in a byte is defined by NB. NB=1 refers to the LSB, D0. NB=8 refers to the MSB, D7.

The Cursor Address is automatically incremented by +1 after execution of these instructions. For example; to clear bit D4 of address 01FFH and set bits D1 and D6 of 0200H use the following sequence:

8.11 Read BUSY FLAG

This instruction is used to check whether the HD61830(B) is in the BUSY state or not. The BUSY FLAG (BF) should be checked before initiating any instruction to the HD61830(B), except when data is written in the register (RS=1).

Table 8.12: Busy Signal Timing

Note: A safety factor of 3 times the maximum BUSY time indicated above should be used if the Busy Flag is not polled by the MPU before each instruction is sent to the HD61830(B).